VLSI/FPGA Design P2-S2: Verilog for Design and Verification

Quickly master Digital IC and FPGA design with this comprehensive course! This section (Chapter 2, Section 2) provides a practical introduction to the fundamentals of designing digital integrated circuits and Field-Programmable Gate Arrays (FPGAs). Learn through concise video lessons (under 10 hours total) packed with examples and coding exercises.

What you'll learn:

• Digital IP/IC Design Flow: Understand the complete process from concept to implementation.
• Digital Fundamentals: A quick review of essential digital logic concepts.
• Verilator & GTKwave Setup: Learn to install and utilize these crucial tools for Verilog development and simulation.
• Verilog Syntax: Master common Verilog syntax for both design and verification.
• Combinational Logic Design: Design fundamental logic gates, multiplexers (MUX), decoders, and one-hot decoders.
• Sequential Logic Design: Implement synchronous and asynchronous D flip-flops.
• Useful Digital Blocks: Design practical building blocks like counters, edge detectors, shift registers, sequence checkers, and sync FIFOs.
• Finite State Machines (FSMs): Design and implement FSMs for various applications.
• Testbench Creation: Learn to create effective testbenches for verifying your designs.
• Synthesis Best Practices: Avoid common synthesis pitfalls like incomplete sensitive lists, latches, multi-driven nets, and combination logic loops.
• Hands-on Practice: Apply your knowledge by designing and verifying a Z-scan and complex sequence checker (FSM).

Course Overview:

This course covers the fundamentals of digital IC and FPGA design, equipping you with the essential knowledge and skills to succeed in this field. You'll benefit from:

• Theory: Explore the connection from MOS transistors to logic cells, arithmetic data paths, Verilog language, hardware function blocks, Static Timing Analysis (STA), on-chip buses (APB/AHB-Lite/AXI4), low-power design, Design for Testability (DFT), and System-on-Chip (SOC) concepts (MCU level).
• Hardware Function Blocks & Architecture: Dive into designs like FSMs, pipelines, arbiters, clock domain crossing (CDC), FIFOs (sync & async), ping-pong buffers, pipeline with control, slide window, pipeline hazards, and forward paths, and systolic arrays.
• Projects: Gain practical experience through three projects:
  • SHA-256 algorithm with a simple interface.
  • SHA-256 with APB/AXI interface.
  • 2D DMA controller with APB/AXI interface.

Learning Progression:

Each hardware architecture is explained with a coding exercise and reference code, gradually increasing in complexity from a few lines to over 200 lines, culminating in projects exceeding 1000 lines.

I'll explain what, how, and why behind each concept, encouraging you to develop your skills and design abilities.

For more detailed information about each chapter, please visit my Udemy homepage.