Function Acceleration on FPGA with Vitis-Part 1: Fundamental

Unlock the power of function acceleration with this comprehensive introduction to High-Level Synthesis (HLS)! Learn how to efficiently implement compute-intensive algorithms on FPGA-based embedded systems using familiar C/C++. No need to dive into complex HDLs like VHDL or Verilog – this course empowers you to design directly in C/C++.

We'll start with an overview of Xilinx Zynq embedded systems and then explore how to leverage the Xilinx toolsets to map your applications onto them. You'll gain hands-on experience with the Xilinx Vitis unified software platform, using it to describe real-world examples and applications for embedded systems development.

This course follows a practical approach, incorporating software and hardware emulation alongside deployment on actual FPGAs. Each section features numerous examples, quizzes, and exercises designed to make complex design concepts easily understandable. You'll work through several examples illustrating core HLS concepts and techniques, solidifying your understanding with ample opportunities for practice.

To truly master the material, you'll complete two exciting projects that integrate all the concepts learned to design functional circuits and hardware controllers.

This course serves as the foundation for a series focused on function acceleration on Zynq-based embedded systems. While this course covers the fundamental principles of HLS, subsequent courses will delve into advanced optimization techniques within the Vitis environment. Perfect for engineers looking to accelerate their embedded designs and harness the power of FPGAs with a C/C++ focused approach.