Arm Barriers 101: Part #3: Expanding our toolkit

Dive deep into Arm Architecture Barriers with Part 3 of our comprehensive training course. This module is designed for software engineers developing system-level software on Arm-based platforms, covering everything from firmware to the kernel, hypervisor, and device drivers.

In this advanced course, you'll master:

• Understanding Memory Ordering: Discover why data memory barriers aren't always enough to ensure correct memory ordering.
• Advanced Barrier Techniques: Learn how to effectively utilize other barriers to enforce specific ordering requirements in complex systems.
• Arm Memory Model: Grasp Arm's formal definition of ordering relationships within its weakly-ordered memory model.
• Barrier Verification: Develop skills to proactively test for missing barriers during simulation, preventing subtle bugs.

Whether you're a beginner just starting with Arm Barriers or a seasoned expert in the Arm Architecture, this course provides valuable insights. We go beyond surface-level explanations, revealing the real mechanics and why things work the way they do.

Learning by Doing: Reinforce your understanding with 30 challenging multiple-choice quiz questions, each accompanied by a detailed video walkthrough explaining the correct answer.

Expert Instruction: This course is crafted and presented by Ash Wilding, a recognized trainer and former lead technical trainer at Arm, with experience as a kernel engineer at both Amazon AWS and Apple. Gain practical knowledge and become proficient in managing memory barriers for robust Arm system design.